It has been recognized that indium-containing (typically InP-based) semiconductor devices such as heterojunction bipolar transistors (HBTs) can have significant advantages over the corresponding more conventional GaAs-based devices. For instance, among the advantages of InP-based HBTs over GaAs-based HBTs are potentially higher speed, lower turn-on voltage (and thus lower power requirements), scalability, and higher substrate thermal conductivity. Furthermore, InP-based HBTs could be more readily integrated with InP-based lasers and other opto-electronic components that operate in the commercially important 1.3-1.55 .mu.m wavelength regime. For a review of InP-based HBTs see, for instance, A. F. J. Levi et al., Proceedings of the 2nd International Conference on InP and Related Materials, Denver, Colo., April 1990, pp. 6-12.
While great strides have been made in the understanding of the physics of indium-containing semiconductor devices and in methods of epitaxial growth of the multilayer structures required for these devices, processing methods used up to now to produce InP-based HBTs are not well adapted for industrial implementation. Thus, it would be highly desirable to have available a method of making indium-containing HBTs (and other indium-containing semiconductor devices) that is compatible with the requirements of device integration, lends itself to commercial implementation through, inter alia, avoidance of critical alignment steps, and makes possible realization of the advantageous device characteristics that are potentially available. This application discloses such a method.